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IBM Unveils Sub-1 Nanometer Chip Technology

IBM says the design overcomes physical limitations that have increasingly challenged traditional chip scaling.

IBM unveils world’s first sub-1 nanometer chip technology. Pic via(@SwarajyaMag)

IBM has unveiled what it describes as the world's first sub-1 nanometer semiconductor technology, introducing a new transistor architecture designed to improve artificial intelligence computing while extending the pace of chip innovation beyond current manufacturing limits.

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The breakthrough centers on a 0.7-nanometer, or 7-angstrom, process that uses a 3D "NanoStack" transistor design. Instead of placing transistors side by side, the new architecture stacks them vertically, allowing engineers to fit nearly 100 billion transistors onto a silicon chip roughly the size of a fingernail.

IBM says the design overcomes physical limitations that have increasingly challenged traditional chip scaling.

According to the company, the NanoStack architecture can deliver up to 50% higher performance or reduce power consumption by as much as 70% compared with existing designs.

IBM Research Director Jay Gambetta described the achievement as a major milestone for future AI, cloud computing, and high-performance computing applications.

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The announcement boosted investor confidence, with IBM shares rising in premarket trading. The company estimates commercial production could begin within five years, positioning the technology as a potential competitor to future offerings from major semiconductor manufacturers.

If successfully commercialized, the innovation could help extend the semiconductor industry's roadmap for another decade while supporting increasingly powerful and energy-efficient AI systems.

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